Low-Noise Pre-Regulator for LT6657A (LTspice simulation)
Takayuki HOSODA
Rev.1.11 (Oct. 17, 2022)

When using the precision voltage-reference IC LT6657A in series mode, the drift of the output reference voltage caused by supply voltage fluctuation or self-heating can be suppressed by inserting, for example, a low-noise pre-regulator as shown in the figure below at the input of the LT6657A.

Japanese Japanese edition is here.

Simulation Schematics

Fig.1 Low-Noise Pre-Regulator for LT6657A Schematic

J1 is a high-gm ultra-low noise JFET and operates as a preregulator for U1, where the output voltage Vout is the reference voltage output Vref of U1 + the gate-to-source voltage Vgs of J1.
J2 operates as a start-up circuit.
The output resistance of FET J1 ≈ 1 / gmOP at the operating point and Cin constitute the LPF.
Though the actual voltage tolerance of J1 is 40 V, the input voltage Vin is limited by the maximum load current, ambient temperature, and thermal dissipation conditions. In this example, the upper limit is taken to be 16 V.

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Schematic : pre-regulator-for-lt6657a.asc — Schematic for the LTspice XVII

Simulation results

It can be seen that it works fine as a pre-regulator for input voltages Vin above 3.1 V. The load regulation is approximately equal to the output resistance of J1 ≈ 1 / gm.

Fig.2 Line Regulations


The PSRR (Power Supply Rejection Ratio) of the pre-regulator is more than 60 dB from DC to 1 MHz.

Fig.3 Power Supply Rejection Ratio


SEE ALSO

External link


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